AI Infrastructure Hits a Wall: Marvell Says Copper Interconnects and Memory Bottlenecks Are the Next Battleground
TREE NEWS reports: At the Six Five Summit 2026, executives from Marvell Technology laid out a stark message for the AI industry: the race for compute power is no longer just about the XPU itself. The real bottlenecks—and the next wave of opportunity—lie in the “attach layer” surrounding the chip, including networking, memory, storage, and security. Executive Vice President of Marvell’s Custom Cloud Solutions business, every XPU now creates three to four additional custom silicon opportunities, and AI infrastructure is moving decisively toward full customization.
Dave Lazovsky, Executive Vice President of the Data Center Networking Group, highlighted that inference-time computing has caused KV cache requirements to explode roughly tenfold in just nine months. Single-rack HBM capacity can no longer support frontier models, forcing a scale-up from 144 interconnected XPUs to pods of approximately 576 XPUs and beyond. This expansion is physically impossible with copper interconnects, making the shift to optical interconnects a “forcing function” rather than an optional upgrade.
Market Implications: Who Benefits from the Structural Shift
The implications for public markets are direct and significant. Memory manufacturers, optical interconnect suppliers, and custom silicon designers stand to benefit from a structural demand shift that is still in its early innings. Analysts estimate cumulative global data center infrastructure capital expenditure will reach $4 trillion to $5 trillion between 2025 and 2030.
- Memory makers: The explosive growth of KV cache and the need for higher-bandwidth, higher-capacity memory directly benefits companies like Micron and SK Hynix, whose market capitalizations have already surged. Marvell’s multi-layered approach—custom HBM, 3D stacking, CXL memory expansion, and its Photonic Fabric Memory offering 32TB of external memory per rack—signals that memory demand will only intensify.
- Optical interconnect suppliers: Marvell is pursuing both Near-Package Optics (NPO) and Co-Packaged Optics (CPO) across Ethernet and UALink switches. The company’s analog SerDes technology can reduce scale-up network power consumption by roughly 4x compared to traditional 2.4T SerDes optical links, potentially cutting total data center energy consumption by over 25%. In a world of severe power shortages, this efficiency advantage is strategically critical.
- Custom silicon designers: With four hyperscalers controlling over 75% of the data center infrastructure addressable market, Marvell has embedded itself deeply into customer development teams, co-designing next-generation switch architectures years in advance. This concentrated market structure enables a business model that is fundamentally different from serving a fragmented customer base.
Why This Matters for Investors
The AI trade has evolved. The first phase was about GPU scarcity and raw compute. The next phase is about the plumbing—interconnects, memory, and networking—that determines whether all that compute can actually work together at scale. Marvell’s comments suggest that investors should look beyond the headline XPU names and consider the broader ecosystem of suppliers enabling the scale-up and scale-out of AI clusters.
The memory wall, in particular, is forcing hyperscalers to rethink entire infrastructure architectures. High memory prices are driving demand for CXL-based memory expansion, memory compression, and even flash-based tiering. Marvell’s CXL products are seeing strong demand from customers looking to repurpose older memory and achieve 2x equivalent capacity through compression. This is not a cyclical story—it is a structural re-architecture of the data center.
Finally, the power constraint is real. With grid interconnection queues stretching seven years and gas turbine deliveries delayed, efficiency gains from analog SerDes and optical interconnects are not just nice-to-have—they are essential for the next generation of AI infrastructure. Investors should watch for adoption milestones in CPO and NPO, as well as design wins in custom HBM and CXL, as key indicators of which suppliers will capture the next leg of AI infrastructure spending.
