CAS Researcher Chen Yunji: Compute Demand Grows 10x Annually, AI-IC Integration Needs Architectural Innovation

The significance here is less the growth figure than the framing: a senior Chinese academic voice is arguing that scaling alone will not close the gap, and that AI-IC co-design is the lever. That matters for chip designers and compute planners, since it implies the bottleneck is architectural rather than purely process-driven. The claim that AI designing better AI chips forms a self-reinforcing cycle is the part worth watching — whether that loop shows up in actual design turnaround and efficiency gains, or remains a rhetorical framing, is the open question.